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[ESS/ICS-DMCS] DMCS in-kind project quarterly meeting - Q12019, Lund

Europe/Warsaw
Conference Room Saturn S6F3

Conference Room Saturn S6F3

Conference Room Saturn S6F3, ESS Lund
    • 09:00 09:20
      Introduction and welcome word 20m
    • 09:20 09:40
      DMCS-LUT status report 20m
      Speaker: Wojciech Cichalewski (Technical Univrsity of Lodz)
    • 09:40 10:00
      ICS status report 20m
      Speakers: Fabio dos Santos Alves (OTIF AB (IBAN)), Henrik Carling (European Spallation Source ERIC), Karl Vestin (European Spallation Source ERIC)
    • 10:00 10:30
      EPICS for IPMI - DMCS status and WU realization plans 30m
      Speaker: Piotr Perek
    • 10:30 10:50
      Cofee break 20m
    • 10:50 11:20
      RTM carrier HW/FW status 30m
      Speakers: Aleksander Mielczarek, Jaroslaw Szewinski (NCBJ)

      1. Presentation on Indico
          - 50 boards are xpected to go into production in 1 month
          - firmware is using framwork from Christian
          - BSP provided by NCBJ
          - on top of this two dedicated RTM support pkgs are made

          - layout of fw is presented
              - some changes to BSP done at DMCS
              - DDR controller not working, must be corrected at NCBJ
              - vivado version required by BSP cannot be used with ESS Framework (2018.2)
              - NCBJ is local IOxOS
              - we are not using MGT links, which require higher version of Vivado
          - plans for future
              - some problems with most recent version form ESS Framework
              - NCBJ must correct BSP
              - PCIe vendor ID should be requestedby ESS
          - software is presented
              - 3 layers of SW, still no epics ready
              - driver based on Xilinx core - 2 simple changes made to the code
              - library provides API
              - some examples provided for API
              - function of bench signal generator

          Discussion:
              - some questions to Christian
              - what is trigger scheme ?
                  - should the delay be generated internally or will it come from timing system ?
                      - discussion on timing will follow
                      - common component for trigger delay as part of framework ?
                      - idea will come form ESS
                      - piezo needs trigger before the pulse
                          - number of EVRS and trigger lines in the system is not enough
              - packaging
                  - should we provide RPM or E3 ? - provide makefile and packaging will be done by ESS (cmake, make, autotools)



       

    • 11:20 12:10
      icBLM - HV control introduction and discussion 50m
      Speakers: Clement Derrez (European Spallation Source ERIC), Irena Dolenc Kittelmann (European Spallation Source ERIC)
    • 12:10 13:10
      Lunch break 1h
    • 13:10 13:25
      E3 - short introduction 15m
      Speaker: Jeong Han Lee (European Spallation Source ERIC)
    • 13:25 13:45
      E3 - DMCS software integration 20m
      Speakers: Jeong Han Lee (European Spallation Source ERIC), Dr Wojciech Jalmuzna (DMCS)
    • 13:45 14:15
      icBLM software architecture and integration with E3 -discussion 30m
      Speaker: Dr Wojciech Jalmuzna (DMCS)
    • 15:00 15:20
      Cofee break 20m
    • 15:20 15:40
      Near future plans, Technical Annex schedule update, ESS global schedule update 20m
    • 15:40 16:00
      Summary and Conclusions 20m